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Final Electrical Specifications
LT5503 1.2GHz to 2.7GHz Direct IQ Modulator and Mixer
FEATURES
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DESCRIPTIO
October 2001
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Single 1.8V to 5.25V Supply Direct IQ Modulator with Integrated 90 Phase Shifter* Four Step RF Power Control 120MHz Modulation Bandwidth Independent Double-Balanced Mixer Modulation Accuracy Insensitive to Carrier Input Power Modulator I/Q Inputs Internally Biased
The LT(R)5503 is a front-end transmitter IC designed for low voltage operation, and is compatible with the LTC family of WLAN products. The IC contains a high frequency quadrature modulator with a variable gain amplifier (VGA) and a balanced mixer. The modulator includes a precision 90 phase shifter which allows direct modulation of an RF signal by the baseband I and Q signals. In a superheterodyne system, the mixer can be used to generate the high-frequency RF input for the modulator by mixing the system's 1st and 2nd local oscillators. The LT5503 modulator output delivers -3dBm at 2.5GHz. The VGA allows output power reduction in three steps up to 13dB with digital control. The baseband inputs are internally biased for maximum input voltage swing at low supply voltage. If needed, they can be driven with external bias voltages.
APPLICATIO S
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IEEE 802.11 DSSS and FHSS High Speed Wireless LAN (WLAN) Wireless Local Loop (WLL) PCS Wireless Data MMDS
, LTC and LT are registered trademarks of Linear Technology Corporation. *Patent Pending
TYPICAL APPLICATIO
2.45GHz BPF VCC2 2V VCC1 2V -2
VCCLO2 VCCLO1 MIXER ENABLE MODULATOR ENABLE LO2IN (750MHz) MIXEN MODEN LO2 /2
MX -
MX +
MODIN VCCRF
VCCMOD
VCCVGA
OUTPUT POWER (dBm)
BQ+ BQ-
0 /1 90
MODOUT VGA
CONTROL LOGIC GND DMODE LO1 LO1IN (2075MHz) GC1 GC2
5503 F01
BI+ BI-
2.45GHz MODULATED RFOUT
Figure 1. 2.45GHz Transmitter Application, Carrier for Modulator Generated by Upmixer
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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-3 -4 -5 -6 1.8 2.4
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2.45GHz Modulated Output Power vs Supply Voltage
PLO1 = -12dBm PLO2 = -18dBm BASEBAND = 1VP-P TA = 27C 3.0 3.6 4.2 SUPPLY VOLTAGE (V) 4.8 5.4
5503 TA01b
1
LT5503
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW BQ - 1 BQ+ 2 GC1 3 MODIN 4 VCCMOD 5 VCCRF 6 LO1 7 VCCLO1 8 DMODE 9 MX + 10 21 FE PACKAGE 20-LEAD PLASTIC TSSOP PIN 21 = GND (BACKSIDE) 20 BI - 19 BI+ 18 GC2 17 MODOUT 16 VCCVGA 15 VCCLO2 14 LO2 13 MODEN 12 MIXEN 11 MX -
Supply Voltage ...................................................... 5.5V Control Voltages .......................... -0.3V to (VCC + 0.3V) Baseband Voltages (BI+ to BI- and BQ+ to BQ-) ...... 2V Baseband Common Mode Voltage .....1V to (VCC - 0.3V) LO1 Input Power .................................................. 4dBm LO2 Input Power .................................................. 4dBm MODIN Input Power ............................................. 4dBm Operating Temperature Range .................-40C to 85C Storage Temperature Range ..................-65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LT5503EFE
TJMAX = 150C, JA = 38C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
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LT5503
ELECTRICAL CHARACTERISTICS
PARAMETER RF Carrier Input (MODRFIN) Frequency Range2 Input VSWR Input Power Baseband Inputs (BI +, BI -, BQ +, BQ -) Frequency Bandwidth (3dB) Differential Input Voltage for 1dB Compressed Output DC Common-Mode Voltage Differential Input Resistance Input Capacitance Gain Error Phase Error Modulated RF Carrier Output (MODRFOUT) Output Power, Max Gain Output VSWR Image Suppression Carrier Suppression Output 1dB Compression Output 3rd Order Intercept Output 2rd Order Intercept Broadband Noise VGA Control Logic (GC2, GC1) Switching Time Input Current Input Low Voltage Input High Voltage Output Power Attenuation Output Power Attenuation Output Power Attenuation Modulator Enable (MODEN) Low = Off, High = On Turn ON/OFF Time Input Current Enable Disable Modulator Power Supply Requirements Supply Voltage Modulator Supply Current Modulator Shutdown Current
(I/Q Modulator)
VCC1 = 3VDC, 2.4GHz matching, MODEN = High, GC1 = GC2 = Low, TA = 27C, MODRFIN = 2.45GHz at -16dBm, [I - IB] and [Q - QB] = 100kHz CW signal at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) (Note 3)
CONDITIONS MIN TYP 1.2 to 2.7 ZO = 50 1.3:1 -20 to -10 120 1 Internally Biased 1.4 18 0.8 0.2 1 -6 ZO = 50 - 26 - 24 fI = 100kHz, fQ = 120kHz fI = 100kHz, fQ = 120kHz 20MHz Offset -3 1.5:1 -34 -32 -3 2 16 -142 100 2 0.4 1.7 GC2 = Low, GC1 = High GC2 = High, GC1 = Low GC2 = High, GC1 = High 4.5 9 13.5 1 105 VCC - 0.4 0.4 1.8 MODEN = High MODEN = Low 29 5.25 38 25 dBc dBc dBm dBm dBm dBm/Hz ns A VDC VDC dB dB dB s A VDC VDC VDC mA A dBm MHz VP-P VDC k pF dB DEG dBm MAX UNITS GHz
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LT5503
ELECTRICAL CHARACTERISTICS
PARAMETER Mixer 2nd LO Input (LO2IN) Frequency Range Input VSWR Input Power Mixer 1st LO Input (LO1IN) Frequency Range2 Input VSWR Input 3rd Order Intercept Mixer RF Output (MIXRFOUT) Frequency Range2 Output VSWR Small-Signal Conversion Gain Output Power LO1 Suppression Output 1dB Compression Broadband Noise Input Current Input Low Voltage (/2) Input High Voltage (/1) Mixer Enable (MIXEN) Low = Off, High = On Turn ON/OFF Time Input Current Enable Disable Mixer Power Supply Requirements Supply Voltage Supply Current (/2 mode) Supply Current (/1 mode) Shutdown Current DMODE = Low, MIXEN = High DMODE = High, MIXEN = High MIXEN = Low 1.8 11.9 10.8 10 5.25 15.5 VDC mA mA A VCC - 0.4 0.4 1 130 s A VDC VDC VCC - 0.4 20MHz Offset LO2 Divider Mode Control (DMODE) Low = fLO2 / 2, High = fLO2 / 1 1 0.4 A VDC VDC ZO = 50 PLO1 = -30dBm -14.7 - 22 1700 to 2700 1.5:1 5 -12.7 - 29 -15 -152 dB dBm dBc dBm dBm/Hz MHz ZO = 50 -30dBm/Tone, f = 200kHz 1400 to 2400 1.5:1 -12 dBm MHz ZO = 50 50 to 1000 1.4:1 -20 to -12 dBm MHz
(Mixer)
VCC2 = 3VDC, 2.4GHz matching, MIXEN = High, DMODE = Low (LO2 / 2 mode), TA = 27C, LO2IN = 750MHz at -18dBm, LO1IN = 2075MHz at -12dBm. MIXRFOUT measured at 2450MHz, unless otherwise noted. (Test circuit shown in Figure 2.) (Note 3)
CONDITIONS MIN TYP MAX UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: External component values on the final test circuit shown in Figure 2 are optimized for operation in the 2.4GHz to 2.5GHz band.
Note 3: Specifications over the -40C to 85C temperature range are assured by design, characterization and correlation with statistical process controls.
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LT5503
(I/Q Modulator) VCC1 = 3VDC, 2.4GHz matching, MODEN = high, GC1 = GC2 = low (max gain), TA = 27C, MODRFIN = 2.45GHz at -16dBm, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) Modulator Supply Current vs Supply Voltage
38 36
SHUTDOWN CURRENT (A) SUPPLY CURRENT (mA)
TYPICAL PERFOR A CE CHARACTERISTICS
34 32 30 28 26 24 22 20 1.8
TA = 85C
10 TA = 85C
INPUT CURRENT (A)
TA = 27C
TA = -40C
4.6 2.5 3.9 3.2 VCC1 SUPPLY VOLTAGE (V)
SSB Output Power vs I, Q Amplitude
0 5.25 VDC -5
SSB OUTPUT POWER (dBm)
3 VDC 1.8 VDC
OUTPUT POWER (dBm)
-10 -15 -20 -25 -30 -35 -40 -45 0.1 10 0.01 1 I, Q DIFFERENTIAL INPUT VOLTAGE (VP-P)
5503 G04
-15 -20 -25 -30 -35 -40 0.1 CARRIER IMAGE 1 I, Q INPUT FREQUENCY (MHz) 10
5503 G05
RETURN LOSS (dB)
POUT (dBm)
UW
5503 G01
Modulator Shutdown Current vs Supply Voltage
100 MODEN = LOW
220 200 180
MODEN Current vs Enable Voltage
MODEN = VCC1
TA = 85C 160 140 120 100 80 60 TA = -40C TA = 27C
1 TA = 27C
5.3
0.1 1.8
TA = -40C 4.6 2.5 3.9 3.2 VCC1 SUPPLY VOLTAGE (V) 5.3
5503 G02
40 1.8
2.5
4.6 3.9 3.2 MODEN VOLTAGE (V)
5.3
5503 G03
Baseband Frequency Response I/Q Amplitude = 1VP-P
0 -5 -10 DESIRED SIDEBAND
-10 0
MODRFIN and MODRFOUT Return Loss 2.4GHz Matching
MODRFOUT
-20
-30 MODRFIN -40 2050
2250
2450 2650 FREQUENCY (MHz)
2850
5503 G06
Typical SSB Spectrum
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 2449.6 2449.8 2450.0 2450.2 2450.4 FREQUENCY (MHz) 2450.6
5503 G07
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LT5503
(I/Q Modulator) 2.4GHz matching, MODEN = high, GC1 = GC2 = low (max gain), MODRFIN = 2.45GHz, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) SSB Output Power vs Input Power VCC1 = 1.8V
-2 -4 TA = 27C
TYPICAL PERFOR A CE CHARACTERISTICS
CARRIER SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm)
-6 -8 -10 -12 -14 -16 -18 -20 -24
TA = -40C TA = 85C
IMAGE SUPPRESSION (dBc)
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
SSB Output Power vs Input Power VCC1 = 3V
0 -2 TA = 27C
CARRIER SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm)
-4 TA = -40C -6 -8 -10 -12 -14 -16 -18 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -10 TA = 85C
IMAGE SUPPRESSION (dBc)
SSB Output Power vs Input Power VCC1 = 5.25V
0 TA = 27C -2
SSB OUTPUT POWER (dBm)
CARRIER SUPPRESSION (dBc)
TA = -40C
-4 -6 -8 -10 -12 -14 -16 -18 -24 -22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm) -10 TA = 85C
IMAGE SUPPRESSION (dBc)
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UW
5503 G08 5503 G11
Carrier Suppression vs Input Power VCC1 = 1.8V
-20
-20
Image Suppression vs Input Power VCC1 = 1.8V
-30 TA = 27C TA = -40C -40 TA = 85C
-30
TA = 27C
-40
TA = -40C TA = 85C
-10
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
5503 G09
5503 G10
Carrier Suppression vs Input Power VCC1 = 3V
-20
-20
Image Suppression vs Input Power VCC1 = 3V
-30
TA = 27C TA = -40C
-30 TA = 27C TA = -40C -40 TA = 85C
-40
TA = 85C
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
5503 G12
5503 G13
Carrier Suppression vs Input Power VCC1 = 5.25V
-20
-20
Image Suppression vs Input Power VCC1 = 5.25V
-30
TA = 27C TA = -40C
-30
TA = 27C TA = -40C TA = 85C
-40
TA = 85C
-40
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
-50 -24
-22 -20 -18 -16 -14 -12 MODRFIN INPUT POWER (dBm)
-10
5503 G14
5503 G15
5503 G16
LT5503 TYPICAL PERFOR A CE CHARACTERISTICS
Output Power vs Frequency 1.2GHz Matching
0 -2 GC2, GC1 = 00
VCC1 = 3VDC, MODEN = high, TA = 27C, PMODRFIN = -16dBm, (I-IB) and (Q-QB) = 100kHz sine at 1VP-P differential, Q leads I by 90, unless otherwise noted. (Test circuit shown in Figure 2.) Carrier Feedthrough vs Frequency 1.2GHz Matching
-30
-30 GC2, GC1 = 00
SSB OUTPUT POWER (dBm)
-4 -6 -8 -10 -12 -14 -16 -18 -20 1000 1100 1200 1300 MODRFIN FREQUENCY (MHz) 1400
5503 G17
01 10 -50 11
IMAGE (dBm)
01
CARRIER (dBm)
10
11
Output Power vs Frequency 1.9GHz Matching
2 0 GC2, GC1 = 00
SSB OUTPUT POWER (dBm)
-2 -4 -6 -8 -10 -12 -14 -16 -18 1650 1750 1850 1950 2050 MODRFIN FREQUENCY (MHz) 2150 11 10 01
CARRIER (dBm)
IMAGE (dBm)
Output Power vs Frequency 2.4GHz Matching
0 -2 SSB OUTPUT POWER (dBm) -4
CARRIER (dBm)
GC2, GC1 = 00
GC2, GC1 = 00
01
-8 -10 -12 -14 -16 -18 2250 2350 2450 2550 MODRFIN FREQUENCY (MHz) 2650
5503 G23
11
IMAGE (dBm)
-6
10 11
UW
5503 G20
(I/Q Modulator)
SSB Image vs Frequency 1.2GHz Matching
GC2, GC1 = 00 -40
-40 01 10 11 -50
-60 1000
1100 1200 1300 MODRFIN FREQUENCY (MHz)
1400
5503 G18
-60 1000
1100 1200 1300 MODRFIN FREQUENCY (MHz)
1400
5503 G19
Carrier Feedthrough vs Frequency 1.9GHz Matching
-30 GC2, GC1 = 00 01 -40 10 -50 11
-30
SSB Image vs Frequency 1.9GHz Matching
GC2, GC1 = 00
-40
01 10 11
-50
-60 1650
1750 1850 1950 2050 MODRFIN FREQUENCY (MHz)
2150
-60 1650
1750 1850 1950 2050 MODRFIN FREQUENCY (MHz)
2150
5503 G21
5503 G22
Carrier Feedthrough vs Frequency 2.4GHz Matching
-30 GC2, GC1 = 00
-30
SSB Image vs Frequency 2.4GHz Matching
01 -40 10
-40 01 10 11 -50
-50
-60 2250
2350 2450 2550 MODRFIN FREQUENCY (MHz)
2650
5503 G24
-60 2250
2350 2450 2550 MODRFIN FREQUENCY (MHz)
2650
5503 G25
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LT5503
(Mixer) 2.4GHz matching, MIXEN = high, DMODE = low (LO2 / 2 mode), LO2IN = 750MHz at -18dBm, LO1IN = 2075MHz. MIXRFOUT measured at 2450MHz, unless otherwise noted. (Test circuit shown in Figure 2.) Mixer Supply Current vs Supply Voltage (LO2 / 2 Mode)
14 TA = 85C 13 SUPPLY CURRENT (mA) 12 11 10 9 8 TA = 27C 13 12 11 10 TA = -40C 9 TA = 27C 8 1.8 2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V) 5.3
5503 G26
TYPICAL PERFOR A CE CHARACTERISTICS
TA = 85C TA = 27C
SHUTDOWN CURRENT (A)
SUPPLY CURRENT (mA)
TA = -40C
RF Output Power vs LO1 Input Power (VCC2 = 1.8V)
-12 -14 TA = -40C -16 -18 TA = 27C -20 TA = 85C -22 -24 -26 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6 -12 -14
MIXRFOUT POWER (dBm)
MIXRFOUT POWER (dBm)
-16 -18
MIXRFOUT POWER (dBm)
LO1 Feedthrough vs LO1 Input Power (VCC2 = 1.8V)
-20 TA = -40C -20
LO1 FEEDTHROUGH (dBc)
LO1 FEEDTHROUGH (dBc)
LO1 FEEDTHROUGH (dBc)
-25
TA = 27C
TA = 85C
-30
-35
-40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm)
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1195 G29 1195 G32
Mixer Supply Current vs Supply Voltage (LO2 / 1 Mode)
14 DMODE = HIGH 100
Mixer Shutdown Current vs Supply Voltage
MIXEN = LOW
10 TA = 85C 1
0.1 1.8 2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V) 5.3
5503 G27
TA = -40C 5.3
5503 G28
1.8
2.5 3.2 3.9 4.6 VCC2 SUPPLY VOLTAGE (V)
RF Output Power vs LO1 Input Power (VCC2 = 3V)
-12 -14 TA = -40C -16 -18
RF Output Power vs LO1 Input Power (VCC2 = 5.25V)
TA = -40C
TA = 27C -20 TA = 85C -22 -24 -26 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6
TA = 27C -20 TA = 85C -22 -24 -26 -28 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm) -6
1195 G30
1195 G31
LO1 Feedthrough vs LO1 Input Power (VCC2 = 3V)
-20
LO1 Feedthrough vs LO1 Input Power (VCC2 = 5.25V)
-25 TA = 27C -30
TA = 85C TA = -40C
-25 TA = 27C -30 TA = 85C
TA = -40C
-35
-35
-6
-40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm)
-6
-40 -30 -27 -24 -21 -18 -15 -12 -9 LO1IN POWER (dBm)
-6
1195 G33
1195 G34
LT5503
(Mixer) VCC2 = 3VDC, MIXEN = high, DMODE = low (LO2 / 2mode), TA = 27C, unless otherwise noted. (Test circuit shown in Figure 2.) RF Output Power and LO1 Feedthrough 1.9GHz Matching
-12 OUTPUT POWER -14 RF OUTPUT (dBm) -10
CONVERSION GAIN (dB)
TYPICAL PERFOR A CE CHARACTERISTICS
RETURN LOSS (dB)
-16
-18 LO1 FEEDTHROUGH -20 LO2IN = 480MHz AT -18dBm LO1IN = fRF -240MHz AT -12dBm 1750 1950 2050 1850 RF OUTPUT FREQUENCY (MHz)
-22 1650
RF Output Power and LO1 Feedthrough 2.4GHz Matching
-12 OUTPUT POWER 0
-14
CONVERSION GAIN (dB)
RETURN LOSS (dB)
RF OUTPUT (dBm)
-16 LO1 FEEDTHROUGH -18
-20 LO2IN = 750MHz AT -18dBm LO1IN = fRF -375MHz AT -12dBm 2350 2550 2450 RF OUTPUT FREQUENCY (MHz)
-22 2250
INPUT CURRENT (A)
UW
0
5503 G35
5503 G38
Small-Signal Conversion Gain and IIP3 1.9GHz Matching
6 -3
LO1IN and MIXRFOUT Return Loss 1.9GHz Matching
0 -5 -10 -15 -20 LO1IN -25 -30 1100 1300 1500 1700 1900 2100 2300 2500 FREQUENCY (MHz)
5503 G37
4
SMALL-SIGNAL CONVERSION GAIN
-6
-20
2
-9
LO1 (dBc)
IIP3 (dBm)
MIXRFOUT
-30
0 IIP3 -2 LO2IN = 480MHz AT -18dBm LO1IN = fRF -240MHz AT -30dBm/TONE 1750 1950 2050 1850 RF OUTPUT FREQUENCY (MHz)
-12
-40
-15
-50 2150
-4 1650
-18 2150
5503 G36
Small-Signal Conversion Gain and IIP3 2.4GHz Matching
6 -3
0 -5 -10 -15
LO1 and MIXRFOUT Return Loss 2.4GHz Matching
-10
4
SMALL-SIGNAL CONVERSION GAIN
-6
-20
2 IIP3
-9
LO1 (dBc)
IIP3 (dBm)
MIXRFOUT LO1
-30
0
-12
-20 -25 -30 1450 1650 1850 2050 2250 2450 2650 2850 FREQUENCY (MHz)
5503 G40
-40
-2 LO2IN = 750MHz AT -18dBm LO1IN = fRF -375MHz AT -30dBm/TONE 2350 2550 2450 RF OUTPUT FREQUENCY (MHz)
-15
-50 2650
-4 2250
-18 2650
5503 G39
MIXEN Input Current vs Enable Voltage (MIXEN = VCC2)
300 270 240 210 180 150 120 90 60 30 1.8 2.5 3.9 3.2 MIXEN VOLTAGE (V) 4.6 5.3
5503 G41
TA = 85C
TA = -40C TA = 27C
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LT5503
PI FU CTIO S
BQ- (Pin 1): Negative Baseband Input Pin of the Modulator Q-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. BQ+ (Pin 2): Positive Baseband Input Pin of Modulator QChannel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. GC1 (Pin 3): Gain Control Pin. This pin is the least significant bit of the four-step modulator gain control. MODIN (Pin 4): Modulator Carrier Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is required for a 50 source. VCCMOD (Pin 5): Power Supply Pin for the I/Q Modulator. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. VCCRF (Pin 6): Power Supply Pin for the I/Q Modulator Input RF Buffer and Phase Shifter. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. LO1 (Pin 7): Mixer 1st LO Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is required for a 50 source. VCCLO1 (Pin 8): Power Supply Pin for the Mixer LO1 Circuits. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. DMODE (Pin 9): Mixer 2nd LO Divider Mode Control Pin. Low = divide-by-2, High = divide-by-1. MX+ (Pin 10): Mixer Positive RF Output Pin. This pin must be connected to VCC through an external matching network. MX- (Pin 11): Mixer Negative RF Output Pin. This pin must be connected to VCC through an external matching network. MIXEN (Pin 12): Mixer Enable Pin. When the input voltage is higher than VCC - 0.4V, the mixer circuits supplied through pins 8, 10, 11 and 15 are enabled. When the input voltage is less than 0.4V, these circuits are disabled. MODEN (Pin 13): Modulator Enable Pin. When the input voltage is higher than VCC - 0.4V, the modulator circuits supplied through pins 5, 6, 16 and 17 are enabled. When the input voltage is less than 0.4V, these circuits are disabled. LO2 (Pin 14): Mixer 2nd LO Input Pin. This pin is internally biased and should be AC-coupled. An external matching network is not required, but can be used for improved matching to a 50 source. VCCLO2 (Pin 15): Power Supply Pin for the Mixer LO2 Circuits. This pin should be externally connected to the other VCC pins and decoupled with 1000pF and 0.1F capacitors. VCCVGA (Pin 16): Power Supply Pin for the Modulator Variable Gain Amplifier. This pin should be externally connected to the other VCC pins through a 47 resistor and decoupled with a good high frequency capacitor (2pF typical) placed close to the pin. MODOUT (Pin 17): Modulator RF Output Pin. This pin must be externally biased to VCC through a bias choke. An external matching network is required to match to 50. GC2 (Pin 18): Gain Control Pin. This pin is the most significant bit of the four-step modulator gain control. BI+ (Pin 19): Positive Baseband Input Pin of the Modulator I-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. BI- (Pin 20): Negative Baseband Input Pin of the Modulator I-Channel. This pin is internally biased to 1.4V, but can also be overdriven with an external DC voltage greater than 1.4V, but less than VCC - 0.4V. GROUND (Backside Contact): Circuit Ground Return for the Entire IC.
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LT5503
BLOCK DIAGRA W
BQ+ 2 BQ- 1 BI- 20 BI+ 19 V-I VCCMOD 5 16 VCCVGA VGA 17 MODOUT V-I VCCRF 6 RF BUFFER MODIN 4 90 0 CONTROL LOCIC 3 GC1 18 GC2 MODULATOR BIAS CIRCUITS 13 MODEN VCCLO1 8 LO1 BUFFER LO1 7 LIM /2 /1 LIM MIXER BIAS CIRCUITS 12 MIXEN 15 VCCLO2 14 LO2 21 GND (BACKSIDE) 10 11 9 DMODE MX+ MX-
5503 BD
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LT5503
TEST CIRCUIT
C17 1F QB 1 BQ - 21 (BACKSIDE) GND LT5503 BI - 20 C18 1F IB
Q
2
BQ+
BI+
19 C16 1F L2 C2
I
C15 1F 3 GC1 GC1 C3 MODRFIN C10 5 VCC1 C20 1000pF C4 LO1IN C11 8 VCCLO1 L4 6 VCCRF L3 4
GC2
18
GC2
MODIN
MODOUT
17 R2 47 C1 2.2pF L1 R1 C23
MODRFOUT
VCCMOD VCCVGA
16
C7
VCCLO2
15
VCC1 C19 0.01F
7
LO1
LO2
14
C22 1000pF LO2IN MODEN C14 100pF
MODEN
13
C43 8.2pF
DMODE
9
DMODE
MIXEN
12
MIXEN
10 C12 1000pF
MX +
MX -
11
L5
C13 8.2pF
L6
VCC2 C21 0.01F C5 4 1 C9 MIXRFOUT T1 2 3 5 NOTE: VCC1 AND VCC2 POWER THE MODULATOR AND UPMIXER SECTIONS RESPECTIVELY.
5503 F02
C6
Application Dependent Component Values 1.2GHz Matching (Modulator Only) L1 L2 L3 C2, C3, C7 C10 C23 R1 C4 C5, C6 C9 C11 L4 L5,L6 T1 33nH 12nH 12nH 39pF 2.7pF n/a 240 n/a n/a n/a n/a n/a n/a n/a 1.9GHz Matching 22nH 5.6nH 4.7nH 15pF 1.8pF 1.5pF 390 15pF 1.8pF 15pF 2.2pF 6.8nH 5.6nH LDB15C101A1900 2.4GHz Matching 18nH 2.7nH 2.7nH 8.2pF 1.2pF 1.5pF 390 8.2pF 2.2pF 2.7pF 1.2pF 4.7nH 2.2nH LDB15C500A2400
Figure 2. Test Schematic for 1.2GHz, 1.9GHz and 2.4GHz Applications
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LT5503
APPLICATIO S I FOR ATIO
The LT5503 consists of a direct quadrature modulator and a mixer. The mixer operates over the range of 1.7GHz to 2.7GHz, and the modulator operates with an output range of 1.2GHz to 2.7GHz. The LT5503 is designed specifically for high accuracy digital modulation with supply voltages as low as 1.8V. It is suitable for IEEE 802.11b wireless local area network (WLAN), MMDS and wireless local loop (WLL) transmitters. A dual-conversion RF system requires two local oscillators to convert signals between the baseband and RF domains (see Figure 3). The LT5503's double-balanced mixer can be used to generate the LT5503 modulator's high frequency carrier input (MODRFIN) by mixing the systems 1st and 2nd local oscillators (LO1 and LO2). In this case, a bandpass filter is required to select the desired mixer output for the modulator input. The mixer's RF differential output produces -12dBm typically at 2.45GHz and the modulator MODIN pin requires -16dBm, driven single-ended. This allows approximately 4dB margin for
LNA
LT5503
VGA
Figure 3. Example System Block Diagram for a Dual Conversion System
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bandpass filter loss. The balanced output from the modulator is applied to a variable gain amplifier (VGA) that provides a single-ended output. Note that the modulator can also be used independently of the mixer, freeing the mixer to be used anywhere in the system. In this case, MODRFIN will be driven from an external frequency source. Modulator Baseband The baseband I and Q inputs (BI+/BI - and BQ+/BQ -) are internally biased to 1.4V to maximize the input signal range at low supply voltage. This bias voltage is stable over temperature, and increases by approximately 50mV at the maximum supply voltage. The modulator I and Q inputs have very wide bandwidth (120MHz typical), making the LT5503 suitable for even the most wideband modulation applications. For best carrier suppression and lowest distortion, differential input drive should be used. Singleended drive is possible too, with the unused inputs ACcoupled to ground.
LT5502 I 90 /2 0 Q A/D A/D 1ST LO 2ND LO 90 0 /2 /1 I D/A Q D/A
5503 F03
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LT5503
APPLICATIO S I FOR ATIO
AC-Coupled Baseband. Figure 4 shows the simplified circuit schematic of a high-pass AC-coupled baseband interface.
CCPL I CCPL IB 0.8pF CCPL Q CCPL QB 0.8pF
5505 F04
BI+ LT5503 0.8pF
BI-
18k
BQ+ 0.8pF D/A IINPUT OQP 18k BQ
+
BQ-
18k
Figure 4. AC-Coupled Baseband Interface
OQN
With approximately 18k of differential input resistance, the suggested minimum AC-coupling capacitor can be determined using the following equation:
C CPL = 1 (18 * 103 * * fC )
where fC is the 3dB cut-off frequency of the baseband input signal. A larger capacitor may be used where the settling time of charging and discharging the AC-coupling capacitor is not critical.
DC-Coupled Baseband. The baseband inputs' internal bias voltage can be overdriven with an external bias circuit. This facilitates direct interfacing to a D/A converter for faster transient response. In this case, the LT5503's baseband inputs are DC biased by the converter. The optimal VBIAS is 1.4V, independent of VCC. In general, the maximum VBIAS should be less than VCC - 0.4V. The DC load on each converter output can be approximated using the following equation where IINPUT is the current flowing into a modulator input:
IINPUT V - 1.4V = BIAS 9k
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Figure 5 shows a simplified circuit schematic for interfacing the LT5503's baseband inputs to the outputs of a D/A converter. OIP and OIN are the positive and negative baseband outputs, respectively, of the converter's I-channel. Similarly, OQP and OQN are the positive and negative baseband outputs, respectively, of the converter's Q-channel.
IINPUT OIP BI- 18k 0.8pF BI+ LT5503 IINPUT OIN 0.8pF 0.8pF IINPUT BQ- 0.8pF
5505 F05
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Figure 5. DC-Coupled Baseband Interface
Modulator RF Input (MODRFIN) The modulator RF input buffer is driven single-ended. An internal active balun circuit produces balanced signals to drive the integrated phase shifter. Limiters following the phase shifter output accommodate a wide range of MODRFIN power, resulting in minimal degradation of modulation gain/phase accuracy performance or carrier feedthrough. This pin is easily matched to a 50 source with the simple lowpass network shown in Figure 2. This pin is internally biased, therefore an AC-coupling capacitor is required. Modulator VGA (Variable Gain Amp) The VGA has two digital selection lines to provide a nominal 0dB, 4.5dB, 9dB and 13.5dB attenuation from the maximum modulator output power setting. The logic table is shown below:
GC2 Attenuation GC1 Low High Low 0dB 4.5dB High 9dB 13.5dB
LT5503
APPLICATIO S I FOR ATIO
Pin 16 should be connected externally to VCC through a low value series resistor (47 typical). To assure proper output power control, a good, local high frequency AC ground for Pin 16 is essential. The MODOUT port of the VGA is an open collector configuration. An inductor with high self resonance frequency is required to connect Pin 17 to VCC as a DC return path, and as a part of the output matching network. Additional matching components are required to drive a 50 load as shown in Figure 2. The amplifier is designed to operate in Class A for low distortion performance. The typical output 1dB compression point (P1dB) is -3dBm at 2.45GHz. When the differential baseband input voltages are higher than 1VP-P, the VGA operates in Class AB mode, and the distortion performance of the modulator is degraded. The logic control inputs do not draw current when they are low. They draw about 2A each when high. Mixer LO1 Port The mixer LO1 input port is the linear input to the mixer. It consists of an active balun amplifier designed to operate over the 1.4GHz to 2.4GHz frequency range. There is a linear relationship between LO1 input power and MIXRFOUT power for LO1 input levels up to approximately -20dBm. After that, the mixer output begins to compress. When operated in the recommended -14dBm to -8dBm input power range, the mixer is well compressed, which in turn creates a stable output level for the modulator input. As shown in Figure 2, a simple lowpass matching network is required to match this pin to 50. This pin is internally biased, therefore an AC-coupling capacitor is required.
MX + 10
11 MX -
L5 LB+ C5 C9 MIXRFOUT
VCC
L6 LB- RTERM 51 CBYPASS
5503 F06
C6
Figure 6. 50 Mixer Output Matching Without a Balun
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Mixer LO2 Port The mixer LO2 port is designed to operate in the 50MHz to 1000MHz range. The first stage is a limiting amplifier. This stage produces the correct output levels to drive the internal divider circuit reliably, with LO2 input levels down to -20dBm. The output of the divider then drives another stage, which in turn switches the nonlinear inputs of the double-balanced mixer. Note that the mixer output will produce broadband noise if the LO2 signal level is too low. The input amplifier is designed for a good match over the entire frequency range. The only requirement (Figure 2) is an external AC-coupling capacitor. Mixer Output Ports (MX+/MX-) The mixer output is a differential open collector configuration. Bias current is supplied to these two pins through the center tap of a balun as shown in Figure 2. Simple lowpass matching is used to transform each leg of the mixer output to 25 for the balun's 50 input impedance. The balun approach provides the highest output power and best LO1 suppression, but is not absolutely necessary. It is also possible to match each output to 50 and couple power from one output. The unused output should be terminated in the same characteristic impedance. In this case, output power is approximately 2dB lower and LO1 suppression degrades to approximately 15dBc. A schematic for this approach is shown in Figure 6 where inductors LB + and LB - supply bias current to the mixer's differential outputs, and resistor RTERM terminates the unused output.
1.9GHz L5,L6 C5, C6 C9 5.6nH 1.8pF 15pF 2.4GHz 2.7nH 0.68pF 8.2pF
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LT5503
APPLICATIO S I FOR ATIO
EVALUATION BOARD
Figure 7 shows the circuit schematic of the evaluation board. The MODRFIN, MODRFOUT and MIXRFOUT ports are matched to 50 at 2.45GHz. The LO1IN port is matched to 50 at 2.1GHz and the LO2IN port is internally matched. A 390 resistor is used to reduce the quality factor (Q) of the modulator output and deliver an output power of -3dBm typically. A lower value resistor may be used if the desired output power is lower. For example, the output power will be 3dB lower if a 200 resistor is used. Inductors with high self-resonance frequency should be used for L1 to L6. For simpler evaluation in a lab environment, the evaluation board includes op amps to convert single-ended I and Q input signals to differential . The op amp configuration has a voltage gain of two; therefore the peak baseband input voltage should be halved to maintain the same RF output power. The op amp configuration shown will maintain acceptable differential balance up to 10MHz typically. It is also possible to bypass the op amps and drive the modulator's differential inputs directly by connecting to the four oversized vias on the board (V1, V2, V3 and V4). Figure 7 also shows a table of matching network values for designs centered at 1.9GHz and1.2GHz. Figure 8 shows the evaluation board with connectors and ICs. Figure 9 shows the test set-up with the upconverting mixer and IQ modulator connected in a transmit configuration. Refer to the demo board DC365A Quick Start Guide for detailed testing information.
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RF Layout Tips: * Use 50 impedance transmission lines up to the matching networks, use of a ground plane is a must. * Keep the matching networks as close to the pins as possible. * Surface mount 0402 outline (or smaller) parts are recommended to minimize parasitic inductances and capacitances. * Isolate the MODOUT pin from the LO2 input by putting the LO2 transmission line on the bottom side of the board. * The only ground connection is through the exposed pad on the bottom of the package. This exposed pad must be soldered to the board in such a way to get complete RF contact. * Low impedance RF ground connections are essential and can only be obtained by one or more vias tying directly into the ground plane. * VCC lines must be decoupled with low impedance, broadband capacitors to prevent instability. * Separate power supply lines should be used to isolate the MODIN signal and other stray signals from the MODOUT line. If possible, power planes should be used. * Avoid use of long traces whenever possible. Long RF traces in particular can lead to signal radiation and degraded isolation, as well as higher losses.
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LT5503
APPLICATIO S I FOR ATIO
E4 VCC4 J1 Q-IN R3 56 1% R13 510 1% C33 4.7F 5 R14 510 1% 6 C32 4.7F
C27 0.01F
+ -
8 U2-1 LT1807 7 7
4 R17 510 1%
C35, 39pF C37, 1pF
C15 R25 1F 49.9
VCC4 R21 10k 1% R23 10k 1% C40 4.7F
2
-
U2-2 LT1807
R19 510 1%
1 C17 1F V1
3
+
R26 49.9
V2
J2 MODRFIN
*C3
*L3 *C10
E1 VCC1 C20 1000pF J3 LO1IN *C4 *L4
VCC2 E3 R29 10 C45 0.1F SW1 1 2 3 4 5 6 12 11 10 9 8 7 R5 20k R6 20k R7 20k R8 2.7k R4 2.7k C43 8.2pF C12 1000pF *C11
VCC3 C24 4.7F
E2 VCC2 C21 0.01F
*C5
C13 8.2pF
J7 MIXER OUT
Figure 7. Evaluation Circuit Schematic for 1.2GHz, 1.9GHz and 2.4GHz Applications
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VCC4 C29 0.01F C28 4.7F 8 U3-1 LT1807 C34 4.7F J4 I-IN R16 510 1% R12 56 1%
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5 R15 510 1% 6
C16 1F
R18 4 510 1% R28 49.9
C36, 39pF C38, 1pF
C41 1F OPT
C42 1F OPT V3 BI - 20 C18 1F
R20 510 1% 1 R27 49.9
-
U3-2 LT1807
2
VCC4 R22 10k 1%
1
LT5503 BQ -
+
3
C39 4.7F
R24 10k 1%
2
BQ+
BI+
19 V4 18 *L2 *C2 J5 MODRFOUT 17 *L1 R2 47 VCC1 *C23
3
GC1
GC2 *R1
4
MODIN
MODOUT 16
5
VCCMOD VCCVGA 15 VCCRF VCCLO2 14 LO1 LO2 13 VCCLO1 MODEN 12 DMODE MIXEN 11 C22 1000pF C1 2.2pF *C7 C19 0.01F C14 100pF VCC2 J6
6
7
LO2IN
8
9
10
MX +
*L5
GND 21
MX -
*L6
*C6
4 1
2
3 5
*C9
T1
5503 F07
L1 L2 L3 C2, C3, C7 C10 C23 R1 C4 C5, C6 C9 C11 L4 L5,L6 T1
*Application Dependent Component Values 1.2GHz Matching (Modulator Only) 1.9GHz Matching 2.4GHz Matching 33nH 22nH 18nH 12nH 5.6nH 2.7nH 12nH 4.7nH 2.7nH 39pF 15pF 8.2pF 2.7pF 1.8pF 1.2pF n/a 1.5pF 1.5pF 240 390 390 n/a 15pF 8.2pF n/a 1.8pF 2.2pF n/a 15pF 2.7pF n/a 2.2pF 1.2pF n/a 6.8nH 4.7nH n/a 5.6nH 2.2nH n/a LDB15C101A1900 LDB15C500A2400
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LT5503
APPLICATIO S I FOR ATIO
QIN
GND LT1807 LT1807
V2 MODRFIN
LO1IN 1 2 3 4 5 6
GND
VCC2
Figure 8. LT5503 Evaluation Board Layout
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IIN VCC4 VCC1 V3 V1 MODRFOUT V4 LT5503 IC LO2IN VCC3
5503 F08
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MIXRFOUT
LT5503
APPLICATIO S I FOR ATIO
DUAL SIGNAL GENERATOR
0 90
GND LT1807 LT1807 SPECTRUM ANALYZER
MODRFIN
SIGNAL GENERATOR 1 LT5503 IC LO1IN GND VCC2 1 2 3 4 5 6 LO2IN VCC3 SIGNAL GENERATOR 1
+
POWER SUPPLY 2
-
EXTERNAL 3dB ATTENUATOR PAD, OR 2.45GHz BPF
5503 F09
Figure 9. Test Set-Up for Upconverting Mixer and I/Q Modulator Transmit Chain Measurements.
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+ -
POWER SUPPLY 4
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+ -
QIN IIN POWER SUPPLY 1
VCC4
V2
V1
V3
V4
MODRFOUT
+ -
POWER SUPPLY 3
MIXRFOUT
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LT5503
PACKAGE DESCRIPTIO
4.30 - 4.48** (.169 - .176) 0 - 8
.105 - .180 (.0041 - .0071)
.50 - .70 (.020 - .028)
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
RELATED PARTS
PART NUMBER LT5502 DESCRIPTION 400MHz Quadrature IF Demodulator with RSSI COMMENTS
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
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FE Package 20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
6.40 - 6.60* (.252 - .260) 5.2 (.205) 20 1918 17 16 15 14 1312 11 3.0 6.25 - 6.50 (.118) (.246 - .256) 1 2 3 4 5 6 7 8 9 10 1.15 (.0453) MAX .65 (.0256) BSC .18 - .26 (.0071 - .0102) .05 - .15 (.002 - .006)
FE20 TSSOP 0501
5503i LT/TP 1001 1.5K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

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